X-Git-Url: http://git.joshuawise.com/firearm.git/blobdiff_plain/3550fbf2e864e370a59d7b6b546f93f4016ebd6b..0bd4b39b04997ee55e3b3e7cadd42c95d8a56fa1:/system.v

diff --git a/system.v b/system.v
index 2467ad7..1635a34 100644
--- a/system.v
+++ b/system.v
@@ -1,5 +1,5 @@
-`define BUS_ICACHE 0
-`define BUS_DCACHE 1
+`define BUS_ICACHE 1
+`define BUS_DCACHE 0
 
 module System(input clk);
 	wire [7:0] bus_req;
@@ -12,7 +12,7 @@ module System(input clk);
 
 	wire bus_req_icache;
 	wire bus_req_dcache;
-	assign bus_req = {6'b0, bus_req_dcache, bus_req_icache};
+	assign bus_req = {6'b0, bus_req_icache, bus_req_dcache};
 	wire bus_ack_icache = bus_ack[`BUS_ICACHE];
 	wire bus_ack_dcache = bus_ack[`BUS_DCACHE];
 	
@@ -220,7 +220,7 @@ module System(input clk);
 		$display("------------------------------------------------------------------------------");
 		$display("%3d: FETCH:            Bubble: %d, Instruction: %08x, PC: %08x", clockno, bubble_out_fetch, insn_out_fetch, pc_out_fetch);
 		$display("%3d: ISSUE:  Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x", clockno, stall_cause_issue, bubble_out_issue, insn_out_issue, pc_out_issue);
-		$display("%3d: DECODE:                      op1 %08x, op2 %08x, op3 %08x, carry %d", clockno, decode_out_op0, decode_out_op1, decode_out_op2, decode_out_carry);
+		$display("%3d: DECODE:                      op0 %08x, op1 %08x, op2 %08x, carry %d", clockno, decode_out_op0, decode_out_op1, decode_out_op2, decode_out_carry);
 		$display("%3d: EXEC:   Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d], Jmp: %d [%08x]", clockno, stall_cause_execute, bubble_out_execute, insn_out_execute, pc_out_execute, execute_out_write_reg, execute_out_write_data, execute_out_write_num, jmp_out_execute, jmppc_out_execute);
 		$display("%3d: MEMORY: Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x, Reg: %d, [%08x -> %d]", clockno, stall_cause_memory, bubble_out_memory, insn_out_memory, pc_out_memory, memory_out_write_reg, memory_out_write_data, memory_out_write_num);
 		$display("%3d: WRITEB:                      CPSR %08x, SPSR %08x, Reg: %d [%08x -> %d], Jmp: %d [%08x]", clockno, writeback_out_cpsr, writeback_out_spsr, regfile_write, regfile_write_data, regfile_write_reg, jmp_out_writeback, jmppc_out_writeback);