| 1 | module Terminal( |
| 2 | input clk, |
| 3 | |
| 4 | input cp_req, |
| 5 | input [31:0] cp_insn, |
| 6 | output reg cp_ack, |
| 7 | output reg cp_busy, |
| 8 | input cp_rnw, |
| 9 | output reg [31:0] cp_read = 0, |
| 10 | input [31:0] cp_write); |
| 11 | |
| 12 | /* Terminal pretends to be cp5. */ |
| 13 | reg towrite = 0; |
| 14 | reg [7:0] data = 0; |
| 15 | |
| 16 | always @(*) |
| 17 | begin |
| 18 | towrite = 0; |
| 19 | data = 8'hxx; |
| 20 | cp_ack = 0; |
| 21 | cp_busy = 0; |
| 22 | if (cp_req && (cp_rnw == 0) && (cp_insn[27:24] == 4'b1110) && (cp_insn[19:16] == 4'b0000) && (cp_insn[11:8] == 4'h5)) |
| 23 | begin |
| 24 | towrite = 1; |
| 25 | data = cp_write[7:0]; |
| 26 | cp_ack = 1; |
| 27 | end |
| 28 | end |
| 29 | `ifdef verilator |
| 30 | always @(posedge clk) |
| 31 | if (towrite) |
| 32 | $c("{extern void term_output(unsigned char d); term_output(",data,");}"); |
| 33 | `endif |
| 34 | endmodule |