Add support for CellularRAM on Nexys2.
[firearm.git] / xst / FireARM.ucf
CommitLineData
1e7ff543
JW
1NET "xtal" LOC="B8" | CLOCK_DEDICATED_ROUTE = FALSE | TNM_NET = xtal;
2TIMESPEC "TS_xtal"=PERIOD "xtal" 50 MHz HIGH 50%;
3//NET "coreclk" TNM = coreclk;
4
5//TIMESPEC TSctl = FROM coreclk TO CR_CTL 5ns;
6//TIMESPEC TSdatao = FROM coreclk TO CR_DATA 5ns;
7//TIMESPEC TSdatai = FROM CR_DATA TO coreclk 5ns;
8//TIMESPEC TSaddr = FROM coreclk TO CR_ADDR 5ns;
9
10NET "cr_nADV" LOC="J4" | SLEW="fast" | TNM = CR_CTL;
11NET "cr_nCE" LOC="R6" | SLEW="fast" | TNM = CR_CTL;
12NET "cr_nOE" LOC="T2" | SLEW="fast" | TNM = CR_CTL;
13NET "cr_nWE" LOC="N7" | SLEW="fast" | TNM = CR_CTL;
14NET "cr_CRE" LOC="P7" | SLEW="fast" | TNM = CR_CTL;
15NET "cr_nLB" LOC="K5" | SLEW="fast" | TNM = CR_CTL;
16NET "cr_nUB" LOC="K4" | SLEW="fast" | TNM = CR_CTL;
17NET "cr_CLK" LOC="H5" | SLEW="fast" | TNM = CR_CTL;
18
19NET "cr_DQ<0>" LOC="L1" | SLEW="fast" | TNM = CR_DATA;
20NET "cr_DQ<1>" LOC="L4" | SLEW="fast" | TNM = CR_DATA;
21NET "cr_DQ<2>" LOC="L6" | SLEW="fast" | TNM = CR_DATA;
22NET "cr_DQ<3>" LOC="M4" | SLEW="fast" | TNM = CR_DATA;
23NET "cr_DQ<4>" LOC="N5" | SLEW="fast" | TNM = CR_DATA;
24NET "cr_DQ<5>" LOC="P1" | SLEW="fast" | TNM = CR_DATA;
25NET "cr_DQ<6>" LOC="P2" | SLEW="fast" | TNM = CR_DATA;
26NET "cr_DQ<7>" LOC="R2" | SLEW="fast" | TNM = CR_DATA;
27NET "cr_DQ<8>" LOC="L3" | SLEW="fast" | TNM = CR_DATA;
28NET "cr_DQ<9>" LOC="L5" | SLEW="fast" | TNM = CR_DATA;
29NET "cr_DQ<10>" LOC="M3" | SLEW="fast" | TNM = CR_DATA;
30NET "cr_DQ<11>" LOC="M6" | SLEW="fast" | TNM = CR_DATA;
31NET "cr_DQ<12>" LOC="L2" | SLEW="fast" | TNM = CR_DATA;
32NET "cr_DQ<13>" LOC="N4" | SLEW="fast" | TNM = CR_DATA;
33NET "cr_DQ<14>" LOC="R3" | SLEW="fast" | TNM = CR_DATA;
34NET "cr_DQ<15>" LOC="T1" | SLEW="fast" | TNM = CR_DATA;
35
36NET "cr_A<0>" LOC="J1" | SLEW="fast" | TNM = CR_ADDR;
37NET "cr_A<1>" LOC="J2" | SLEW="fast" | TNM = CR_ADDR;
38NET "cr_A<2>" LOC="H4" | SLEW="fast" | TNM = CR_ADDR;
39NET "cr_A<3>" LOC="H1" | SLEW="fast" | TNM = CR_ADDR;
40NET "cr_A<4>" LOC="H2" | SLEW="fast" | TNM = CR_ADDR;
41NET "cr_A<5>" LOC="J5" | SLEW="fast" | TNM = CR_ADDR;
42NET "cr_A<6>" LOC="H3" | SLEW="fast" | TNM = CR_ADDR;
43NET "cr_A<7>" LOC="H6" | SLEW="fast" | TNM = CR_ADDR;
44NET "cr_A<8>" LOC="F1" | SLEW="fast" | TNM = CR_ADDR;
45NET "cr_A<9>" LOC="G3" | SLEW="fast" | TNM = CR_ADDR;
46NET "cr_A<10>" LOC="G6" | SLEW="fast" | TNM = CR_ADDR;
47NET "cr_A<11>" LOC="G5" | SLEW="fast" | TNM = CR_ADDR;
48NET "cr_A<12>" LOC="G4" | SLEW="fast" | TNM = CR_ADDR;
49NET "cr_A<13>" LOC="F2" | SLEW="fast" | TNM = CR_ADDR;
50NET "cr_A<14>" LOC="E1" | SLEW="fast" | TNM = CR_ADDR;
51NET "cr_A<15>" LOC="M5" | SLEW="fast" | TNM = CR_ADDR;
52NET "cr_A<16>" LOC="E2" | SLEW="fast" | TNM = CR_ADDR;
53NET "cr_A<17>" LOC="C2" | SLEW="fast" | TNM = CR_ADDR;
54NET "cr_A<18>" LOC="C1" | SLEW="fast" | TNM = CR_ADDR;
55NET "cr_A<19>" LOC="D2" | SLEW="fast" | TNM = CR_ADDR;
56NET "cr_A<20>" LOC="K3" | SLEW="fast" | TNM = CR_ADDR;
57NET "cr_A<21>" LOC="D1" | SLEW="fast" | TNM = CR_ADDR;
58NET "cr_A<22>" LOC="K6" | SLEW="fast" | TNM = CR_ADDR;
59NET "st_nCE" LOC="R5" | SLEW="fast" | TNM = CR_CTL;
60
61NET "vs" LOC = "u3" |SLEW = "fast";
62NET "hs" LOC = "t4" |SLEW = "fast";
63NET "r<2>" LOC = "r8";
64NET "r<1>" LOC = "t8";
65NET "r<0>" LOC = "r9";
66NET "g<2>" LOC = "p6";
67NET "g<1>" LOC = "p8";
68NET "g<0>" LOC = "n8";
69NET "b<1>" LOC = "u4";
70NET "b<0>" LOC = "u5";
71
72NET "rst" LOC="H13";
73NET "rstact" LOC="J14";
74
75NET "ps2c" LOC="R12" | CLOCK_DEDICATED_ROUTE = FALSE;
76NET "ps2d" LOC="P11";
77
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